1. Field of the Invention
The present invention relates to a manufacturing method of a semiconductor device for flattening a deposition layer formed on a semiconductor substrate which has an irregularity by means of chemical-mechanical polishing (CMP) and more particularly to a method for forming a polishing stop film.
2. Description of Related Art
As is well known, today the size of semiconductor ICs has been greatly reduced and their functions have improved tremendously. Semiconductor manufacturing processes have likewise greatly improved so that these changes in ICs can be commercially implemented. With each improvement, new problems arise. For example, with the increased micronization of wiring patterns in high-density integrated circuits, decreasing of a depth of focus in the well-known lithography process occurs and the difficulty for treatment of and working on so-called "irregular steps" has increased remarkably. Therefore, it has become essential to flatten a deposition film, such as an insulating film, formed on the surface of a semiconductor substrate so as to implement high precision works. Presently, CMP is being used as one of means for realizing the flattening of the deposited film.
By way of background, the general operation of a typical polishing machine for CMP which will be explained.
First, a polishing plate pad is placed on a horizontal table. A polishing plate is mounted on the polishing pad. A polishing cloth for polishing wafers is plastered on the polishing plate. A drive shaft is connected at the center of the polishing plate pad and the polishing plate in order to turn. This drive shaft is turned by a motor via a turn belt. Meanwhile, a wafer is adsorbed on an adsorption plate, on which a template and an adsorption cloth is provided. The wafer is positioned so as to face to the polishing cloth. The adsorption plate is connected with a drive shaft. This drive shaft is turned by the motor via gears. The drive shaft is fixed to a driving table which is disposed above the polishing plate so as to move in the vertical direction.
Because the driving table moves vertically by the shaft, the wafer fixed to the adsorption plate is either pressed to the polishing cloth or is separated from the polishing cloth. The wafer is polished by flowing a polishing agent between the wafer and the polishing cloth to a desired completeness. The wafer may be moved in the X-Y directions (horizontal direction) during the polishing by another driving system.
Referring first to FIG. 15, the problems encountered with the prior art will be described. In FIG. 15, a main surface of a silicon semiconductor substrate 10 is shown on which wiring lines 1 are formed on top of an insulating film 9. An interlayer insulating film 2 such as a chemical vapor deposition (CVD) SiO.sub.2 film is deposited on the wiring lines 1. Because the insulating film 2 has a generally constant thickness, irregularities are created on the surface of the interlayer insulating film 2 corresponding to the wiring lines 1 on the semiconductor substrate 10. Thus, the surface of the insulating film 2 has high level portions (convex portions) 22 and low level portions (concave portions) 21. As shown in FIG. 15, convex portions 22 are created in the region above the wiring lines 1 and a concave portion 21 is created in the region above the insulating film 9 where the wiring lines 1 are not formed. The depth and width of these irregularities depends on the wiring lines 1 on the surface of the semiconductor substrate 10. A polishing stop film 3 such as carbon is deposited on the whole surface of the interlayer insulating film 2.
When CMP is implemented in this state, a polishing cloth 4 of a polishing machine polishes the main surface of the semiconductor substrate 10 coated by the polishing stop film 3. Then, the convex portions 22 above the wiring lines 1 on the surface of the semiconductor substrate 10 are polished as shown in FIG. 15. The polishing is implemented until the polishing stop film 3 at the bottom of the concave portion 21 in the middle of the figure and the region of the convex portions 22 are leveled off to a level equal to the deepest concave portion 21. At this point, the flattening is completed.
According to the method shown in FIG. 15, the polishing stop film 3 on the convex portions 22 is first removed by using the polishing cloth. Therefore, the polishing stop film 3 must have both the qualities of preventing the CMP and of being removed by the CMP. That is, the material of the polishing stop film 3 must be able to be removed in a reasonable amount of time at a rate that is slower than the rate at which the interlayer insulating film 2, (i.e. the film to be polished), is polished. It is difficult in practice to ensure the existence of a large polishing selection ratio (defined as (the polishing rate of the interlayer insulating film 2)/( the polishing rate of the polishing stop film 3)). If the polishing cloth 4 contacts with the bottom of the concave portion 21 of the polishing stop film 3 in an amount of time which exceeds the time obtained by dividing the thickness of the interlayer insulating film 2 (i.e. the film to be polished) by the polishing rate of the polishing stop film 3, it polishes and removes not only the convex portions 22 but also the interlayer insulating film 2 at the concave portion 21 (see FIG. 17a). If CMP is continued at that point, a new concave portion is created where there has been no underlying step and the flattening cannot be achieved perfectly (see FIG. 17b).
In the method shown in FIG. 16, the insulating film 9, the wiring lines 1 and the interlayer insulating film 2 such as a CVD SiO.sub.2 film are formed on the surface of the semiconductor substrate 10 and the polishing stop film 3 such as carbon is deposited on the whole surface of the interlayer insulating film 2 in the same manner with those shown in FIG. 15. However, a photoresist is patterned on the polishing stop film 3 by using lithography after depositing the polishing stop film 3. Then, the polishing stop film 3 is etched by using the patterned photoresist as a mask to leave the polishing stop film 3 only at the concave portion 21 of the interlayer insulating film 2.
The lithography is used for transferring a pattern onto the surface of a semiconductor in the semiconductor technology field. The lithographic process is composed of steps of transferring a mask pattern to a photoresist, etching an underlying film by using the photoresist pattern and removing the photoresist thereafter.
In order to avoid the polishing cloth 4 from contacting with the bottom of the wide width concave, the polishing stop film 3 is left only at the bottom of the concave portion 21, as shown in FIG. 16.
The polishing is implemented until the polishing stop film 3 at the bottom of the concave portion 21 in the middle of the figure and the region of the convex portions 22 are leveled off. Then, the flattening is completed. The use of the method shown in FIG. 16 allows a material having a very large polishing selection ratio for the polishing stop film 3. However, it has a problem that it requires the lithographic process which comprises complicated steps and which considerably increases the production cost of the semiconductor device.